EE-154 VLSI Design

Outline of Final Exam Topics

50% of the exam will be on topics since the midterm:

• Static complementary CMOS gates
• Pseudo-nmos gates
• Pass transistor logic
• Dynamic CMOS logic gates (cascaded gates, domino logic, npCMOS)
• Sequential elements - static and dynamic latches and flip-flops
• Binary adder design

The other 50% will be on problems that tie together concepts from the entire term.