Hardware Description Languages

• Description of a circuit using high-level computer language
• Can be compiled and simulated to ensure proper behavior
• Can be used to describe circuits at many different levels of abstraction

VHDL - VHSIC Hardware Description Language

• VHDL file - contains entity and architecture that describe a logic module or unit
• VHDL compiler - converts file to executable version for simulation
• VHDL simulation output - illustrates the behavior of the circuit outputs for a given set of inputs

Entity Statement

• Identifies the module with a module name
• Defines the input and output ports
• Keywords in and out, type identifier, bit.

Architecture Declaration

• Describes what is inside the module.
• Behavioral, structural, and dataflow classifications of architectures
• Format includes architecture statement, declarations, and body.

VHDL Statement Basics

• Comments: --
• Assignment: <=
• Logic operation keywords: not, and, or, xor, nand, nor, xnor
• Precedence of operations
• Identifiers

VHDL Modeling

• Propagation delays
• Structural modeling
• Components
• Signals
• Port map