CS-237 - Comparative Computer Architecture

Professor Traver 
Fall 2004

Text: Computer Architecture - A Quantitative Approach , John L. Hennessy and David A. Patterson, Morgan Kaufmann, Third Edition, 2003

Course Objectives

Students will be able to understand the most important forces that impact modern computer design.
Students will understand the features of computer architecture that affect performance, cost, and energy efficiency. 
Students will understand modern computer design concepts such as instruction-level parallelism and caches.
Students will be familiar with example processors that illustrate particular design features.

Prerequisite Skills

Ability to convert between decimal, hex and binary number systems.
Ability to analyze and synthesize digital logic circuits.
Ability to do binary arithmetic.
Ability to analyze and design computer programs.
Understanding of basic logic components (memory, registers, multiplexors, decoders).
Basic understanding of computer organization and instruction set architectures.
Basic understanding of memory organizations in computer systems.
Basic understanding of operating systems.
Background Review Quiz Answers and Results

Lecture and Assignment Outline

Week.Lecture Topic Reading/Slides Assignment and Due Date
1.1 Fundamentals: technology trends, cost, price, performance, power Chapter 1 (slides) HW1: Text exercises: 1.4, 1.6, 1.8, 1.10, 1.13, 1.16, 1.18, 1.21, 1.23 (1.8 solution)
Due Monday, September 20
1.2

2.1

 Instruction sets: classifications, addressing, operands, operations, control flow, encoding, compilers. MIPS and Trimedia TM32 examples Chapter 2
(slides)		 HW2: Text exercises: 2.1, 2.2, 2.5, 2.6, 2.8, 2.9, 2.14, 2.18, 2.19
Due Monday, September 27
2.2

3.1

3.2

 Pipelining: hazards, implementation, MIPS examples Appendix A

(slides)

 HW3: Text exercises: A.1, A.2, A.3, 

Due Monday, October 4
3.2
4.1
4.2
5.1		 Instruction-Level Parallelism: data hazards, dynamic scheduling, dynamic hardware prediction, high performance instruction delivery, multiple issue, speculation, P6 architecture example Chapter 3

(slides)

 HW3: Text exercises: 3.1a,c, 3.2, 3.3
Due Monday, October 4

HW4: Text exercises: 3.5, 3.6a, 3.10, 3.14, 3.15, 3.17
Due Monday, October 18

5.2 (October 11) Midterm Exam (open book, one sheet (both sides if necessary) of notes) Chapters 1,2,A  
6.1
6.2

7.1(no class)
7.2
8.1

 Software Approaches to Instruction-Level Parallelism: Compiler techniques, static branch prediction, static multiple-issue, advanced compiler support, hardware support, Intel IA-64 and Itanium examples Chapter 4

(slides)

 HW5: Text exercises: 4.1, 4.2 (in b. "schedule" means reorder), 4.4, 4.5, 4.6
Due Wednesday, October 27

Project proposal
8.2
9.1
9.2
10.1		 Memory: cache review, cache performance, parallelism,  main memories, memory technology, virtual memory, protections, Alpha 21264, Sony Playstation, Sun Fire 6800 examples Chapter 5

(slides)

 HW6: Text exercises: 5.3, 5.5a,b

No due date - solutions will be provided
10.2 Other fascinating architecture topics Presentations Projects
Send comments or questions to traverc@doc.union.edu.