* Subcircuit of control circuit (bottom left of Figure 5.6). Uses
* contX transistors and nor gate. 
.subckt contP po sf pe e op en onp reset Vdd 0
* from nControl
Mpdl bleedout op 0 0 nmos l='2*lambda' w='8*lambda' 
Mpdr bleedout onp 0 0 nmos l='2*lambda' w='8*lambda' 
* from pControl
Mpul bleedout e Vdd Vdd pmos l='2*lambda' w='12*lambda'
Mpur bleedout en Vdd Vdd pmos l='2*lambda' w='12*lambda'
* from nInv
MpdlI sf bleedout 0 0 nmos l='2*lambda' w='12*lambda'
MpdrI po sf 0 0 nmos l='2*lambda' w='12*lambda'
Mbldn bleedout sf po 0 nmos l='8*lambda' w='3*lambda'
* from pInv
MudlI sf bleedout Vdd Vdd pmos l='2*lambda' w='16*lambda'
MudrI po sf Vdd Vdd pmos l='2*lambda' w='16*lambda'
Mbldp bleedout sf po Vdd pmos l='8*lambda' w='3*lambda'
* reset transistor
Mres bleedout reset 0 0 nmos l='2*lambda' w='4*lambda'
* Nor circuit
Mnd1 pe bleedout 0 0 nmos l='2*lambda' w='12*lambda'
Mnd2 pe reset 0 0 nmos l='2*lambda' w='12*lambda'
Mpd1 5 bleedout Vdd Vdd pmos l='2*lambda' w='20*lambda'
Mpd2 pe reset 5 Vdd pmos l='2*lambda' w='20*lambda'
.ends